View EQCO31T20_8415623.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? 2011-2016 microchip technology inc. ds60001301b-page 1 eqco62t20.3/EQCO31T20.3 features complies with the coaxpress v1.1 camera standard ( 1 ) supports up to 68 meters of cable at 6.25 gbps using high-quality coax supports up to 212 meters of cable at 1.25 gbps using high-quality coax single-chip solutions for both the camera side and the frame grabber side, making a bidirectional connection over a single 75 ? coax cable full-duplex, bidirectional data channel - downlink speeds from 1.25 gbps up to 6.25 gbps; differential interfacing straightforward with internal termination resistors - uplink supporting 21 mbps, allowing nanoseconds precise triggering events driven by the frame grabber supports power distribution over the coax up to 900 ma, powering the camera through the same coax transporting data signals low power consumption (<70 mw, 1.2v supply) 16-pin, 0.65 mm pin pitch, 4 mm qfn package small pcb footprint for eqco62t20 and off-chip components, with guaranteed rf-performance -40c to +85c industrial temperature range pb-free and rohs compliant applications high-definition/high-bandwidth links to cameras machine vision for semiconductor chips and display panel inspection systems military, aerospace, medical applications broadcast and surveillance camera systems traffic license plate and monitoring systems high-speed inspection systems for food inspection, bottling inspection, panel inspection, etc. any application requiring a single coax cable which carries power, video data and camera control stream introduction the eqco62t/r20 ( 2 ) chipset is a driver/equalizer chipset that forms a bidirectional, full-duplex communication link over a single coax cable. the eqco62t/r20 chipset is designed to transport up to 6.25 gbps over the downlink channel and to trans- port 21 mbps over the uplink channel. the eqco62t20 is designed to transmit the downlink sig- nal up to 6.25 gbps and receive the uplink signal. the eqco62r20 is designed to receive the downlink sig- nal up to 6.25 gbps and to transmit the uplink signal. power can be transferred over the same cable via external inductors. the chipset is designed to work with several types of 75 ? coaxial cables, including legacy cables as well as thin, flexible lightweight cables. note 1: coaxpress v1.1 standard. free download from the jiia website: http://jiia.org/en/standardization/list/ 2: the EQCO31T20 and eqco31r20 are lower-speed versions of the eqco62t20 and eqco62r20, with a maximum bit rate of 3.125 gbps for the high-speed downlink and the same uplink speed. eqco62t20.3 6.25 gbps as ymmetric coax driver EQCO31T20.3 3.125 gbps as ymmetric coax driver downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 2 ? 2011-2016 microchip technology inc. typical link performance table 1 , ta bl e 2 and ta b l e 3 give an overview of typical link performance at room temperature for the link con- taining the eqco62t20 coax driver in conjunction with the eqco62r20 receiver, using the downlink channel, uplink channel and power transmission simultaneously. performance for eqco62t/r20 and eqco31t/r20 is equal for bit rates up to 3.125 gbps. table 1: belden typical link performance name belden 7731a belden 1694a belden 1505a belden 1505f belden 1855a type long distance industry standard compromise coax flexible thinnest cable diameter (mm) 10.3 6.99 5.94 6.15 4.03 1.25 gbps (m) 194 130 107 80 55 2.5 gbps (m) 162 110 94 66 55 3.125 gbps (m) 147 100 86 60 55 5.0 gbps (m) 87 60 52 35 38 6 . 2 5 g b p s ( m )5 84 03 52 32 5 table 2: gepco typical link performance name gepco vhd1100 gepco vsd2001 gepco vpm2000 gepco vhd2000m gepco vdm230 type long distance industry standard compromise coax flexible thinnest cable diameter (mm) 10.3 6.91 6.15 6.15 4.16 1.25 gbps (m) 212 140 109 81 66 2.5 gbps (m) 185 120 94 67 66 3.125 gbps (m) 169 110 86 61 62 5.0 gbps (m) 102 66 53 36 38 6 . 2 5 g b p s ( m )6 84 43 52 42 5 table 3: canare typical link performance ( 1 ) name canare l-7cfb canare l-5cfb canare l-4cfb canare l-3cfb canare l-2.5cfb type long distance industry standard compromise coax thin cable thinnest cable diameter (mm) 10.2 7.7 6.1 5.5 4 1.25 gbps (m) 165 118 94 72 43 2.5 gbps (m) 135 98 79 66 43 3.125 gbps (m) 122 88 71 60 43 5.0 gbps (m) 71 52 42 36 30 6 . 2 5 g b p s ( m )4 63 42 82 42 0 note 1: specifications from canare are only up to 2 ghz. 5 gbps and 6.25 gbps performance are by extrapolation. downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 3 eqco62t20.3/EQCO31T20.3 table of contents 1.0 device overview ....................................................... ...................................................... ............................................................. 4 2.0 application information.................................................... ................................................. ............................................................ 8 3.0 electrical characteristics .......................................................... ........................................ .......................................................... 15 4.0 packaging................................................................................. .................................................................................................. 17 to our valued customers it is our intention to provide our valued customers with the best documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regar ding this publication, please contact the marketing communications department via e-mail at docerrors@microchip.com or fax the reader response form in the back of this data sheet to (480) 792-4150. we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the vers ion number, (e.g., ds30000a is version a of document ds30000). errata an errata sheet, describing minor operational differences fr om the data sheet and recommended workarounds, may exist for curren t devices. as device/documentation issues become known to us, we will publish an errata sheet. the errata will specify the revisi on of silicon and revision of document to which it applies. to determine if an errata sheet exists for a particular device, please check with one of the following: microchips worldwide web site; http://www.microchip.com your local microchip sales office (see last page) when contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products. downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 4 ? 2011-2016 microchip technology inc. 1.0 device overview the eqco62t/r20 single-coax chipset is designed to simultaneously transmit and receive signals along with power on a single 75 ? coax cable. in one direction, a downlink signal is transmitted. in the opposite direction, a lower-speed uplink is provided. the eqco62t/r20 chipset consists of two chips. the eqco62t20 is a high-speed line driver with an integrated low-speed receiver. the eqco62r20 is a high-speed receiver with an integrated low-speed transmitter. figure 1-1 illustrates a typical eqco62t/r20 link setup. the downlink signal is transmitted with 600 mv trans- mit amplitude at the eqco62t20 side. this signal is attenuated in the coax and recovered by an equalizer integrated in the eqco62r20. the low-speed uplink is transmitted with a lower amplitude of 130 mv to limit the crosstalk with the downlink channel. the downlink channel is intended for 8b/10b nrz coded data with bitrates from 1.25 gbps up to 6.25 gbps. the low-speed uplink operates at a bit rate of 21 mbps, and has a single-ended lvtll input and output. in addition to the downlink channel and the low-speed uplink, the system allows power transmission over the coax by using ferrite beads and external inductors. these external inductors give the communication channel a high-pass characteristic. the uplink receiver inside the eqco62t20 chip recovers the signal lost by this high-pass filter. appropriate inductors need to be selected for correct operation of the link. correct operation is only guaranteed with the inductor combination used in figure 2-1 , even though other components might be suited. the eqco62t/r20 chipset is compatible with the coaxpress v1.1 camera standard. figure 1-1: typical eqco62t/r20 link setup up to 212 meters 75 coax high denition camera eqco 62t20 frame store + camera control up to 6.25 gbps downlink 21 mbps uplink up to 900 ma dc up to 900 ma dc eqco62r20 21 mbps uplink up to 6.25 gbps downlink downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 5 eqco62t20.3/EQCO31T20.3 1.1 pinout and pin description figure 1-2: eqco62t20.3 pi n diagram(viewed from top) table 1-1: eqco62t20.3 pin descriptions pin number pin name signal type description (tab) gnd power connect to ground. 9, 12 vcc power connect to +1.2v of power supply. 1, 4 gnd power connect to ground of power supply. 2, 3 sdip/sdin differential input serial input positive/negative differential serial input. typical input swing is 2x300 mv. minimal input swing is 2x250 mv. 2x50 ? on-chip termination resistor. 11, 10 sdop/sdon differential output differential serial output pair. on-chip 75 ? termination resistors. sdop is connected to the coax cable by a capacitor. sdon needs to be connected to gnd by 75 ? termination resistor and capacitor. swing is fixed to vcc/2. 13 lfvcc power power supply for the uplink output (between 1.2v and 3.3v). 14 lfo output low-frequency uplink output. lvttl with output swing equal to lfvcc. supports capacitive loads up to 20 pf for 21 mbps operation. 5, 6, 7, 8, 15, 16 nc do not connect. leave these pins floating. used for internal testing. gnd tab 16 15 14 13 5 6 7 8 1 2 3 4 12 11 10 9 lfvcc nc sdip vcc nc sdon sdop eqco62t20.3 gnd nc sdin nc nc nc lfo gnd vcc downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 6 ? 2011-2016 microchip technology inc. 1.1.1 sdip/sdin sdip/sdin together form a differential input pair. the serial data received on these pins will be transmitted on sdop/sdon. the input pre-driver automatically corrects for variations in signal levels and different edge slew rates at these inputs before they go into the active splitter/combiner for transmission over the coax. between sdip and sdin inputs, there is a termination resistor of 100 ? . the intention is to always use ac coupling. a transmit wake-up detection circuit puts both the input pre-driver and the output driver into a low-power mode when no signal is detected on the sdip/sdin signal pair. 1.1.2 sdop/sdon the signal at the inputs sdip/sdin is transmitted onto the cable by outputs sdop/sdon. both outputs are internally terminated with 75 ? . the signal on the sdop pin is the sum of the incoming signal (i.e. the signal transmitted by the eqco62r20 on the far end side of the coax) and the outgoing signal (i.e. the signal created based on sdip/sdin). the far- end signal is extracted by subtraction of the near-end signal and the far-end signal, and is restored by the uplink receiver inside the eqco62t20 chip. the sdon signal carries a precise anti-phase signal to the transmitted signal on sdop. sdon must be connected directly to gnd at the connector via a resistor precisely matched to the impedance of the coaxial cable used and an ac coupling capacitor. 1.1.3 lfo lfo is the output of the uplink receiver inside the eqco62t20. the maximum allowed capacitance at the output is 20 pf, with rise and fall times of 5 ns. the maximum output current is 1 ma when lfvcc is 3.3v. 1.1.4 lfvcc the output driver of the uplink receiver in the eqco62t20 has a separate power supply pin. the power supply voltages can be 1.2v up to 3.3v. the out- put swing at lfo is equal to this power supply voltage. a filter capacitor must be placed close to the lfvvc pin of the eqco62t20. downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 7 eqco62t20.3/EQCO31T20.3 1.2 circuit operation figure 1-3: eqco62t20.3 block diagram showing electrical connections 1.2.1 pre-driver the pre-driver removes any dependency for the amplitude and rise time of the incoming signal on sdi. 1.2.2 active signal splitter/ combiner the active splitter/combiner controls the amplitude and rise time of the outgoing coax signal and transmits it via a 75 ? output termination resistor. the output resistor, when balanced with the coax characteristic impedance, also forms part of a hybrid splitter circuit which subtracts the tx output from the signal on the sdo output to give yield the far-end tx signal. 1.2.3 transmit detection the transmit detection detects if an input signal is applied at sdi. the detection circuit looks at the signal amplitude of sdi; if no signal is detected, the pre-driver and output driver are disabled. the lf receiver then continues to operate independently. at the moment the output driver is turned on or off, there can be a bit error in the uplink channel, e.g. by the lf-receiver. 1.2.4 lf receiver the uplink receiver removes unwanted crosstalk from the transmitted near-end signal. afterwards, the uplink signal is restored by detecting edges coming from the uplink signal. at the moment the high-speed output driver is turned on or off, there can be a bit error in the uplink channel, e.g. by the lf-receiver. the initial output state of the lf receiver can be wrong, and subsequent bits will still be received correctly. 1.2.5 lf output driver the uplink output driver converts the signal detected by the lf receiver to an lvttl signal with a controlled rise and fall time. it is required to set the output signal amplitude of this lvttl signal by connecting the lfvcc to the appropriate power supply voltage (max 3.3v). eqco62t20.3 lf output driver active signal splitter/combiner input pre-driver sdop sdipsdin transmit detection lf receiver sdon lfo downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 8 ? 2011-2016 microchip technology inc. 2.0 application information figure 2-1 illustrates a typical schematic implementation. figure 2-1: eqco62t20.3 ty pical application circuit table 2-1: component recommendation for the eqco62t 20.3 board layout ferrite beads fb1 and fb2 (fbmh1608hm102 from taiyo yuden) and inductor l1 (1812ps_103 from coilcraft [10 h]) are recommended for coaxpress. for other applications the inductor value can be larger, leading to a physical larger inductor. connector bnc1 (75 ? right angle bnc connector 5413558-1 from tyco) is recommended for coaxpress. other inductors/ferrite beads/bnc connectors can possibly be used, however, they must be selected carefully for their rf-performance, since performance can decrease significantly. element value size recommended component fb1, fb2 1 k ? @ 100 mhz ferrite bead 0603 fbmh1608hm102 from taiyo yuden (critical) l1 10 h 1812 1812ps_103 from coilcraft (critical) r1 75 ? 1% 0402 r3 1 k ? 0402 c1 33 nf, 50v, x7r 0603 c2 33 nf, x7r 0402/0603 c3, c4, c5 100 nf, x7r 0402 c6 10 nf, 50v, x7r 0402 c7 1 f, 50v, x7r 0805 c8, c9, c10 10 nf, x7r 0402 bnc1 75 ? right angle bnc connector 5413558-1 from tyco (recommended) downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 9 eqco62t20.3/EQCO31T20.3 2.1 guidelines for pcb layout when using the eqco62t/r20 chipset at its full purpose, including low-speed uplink and power supply transmission, it is important not to disturb the rf- performance of the high-speed downlink channel. implementing the circuit illustrated in figure 2-1 with a different pcb layout will in first instance not deliver full data sheet performance. the simplest way of meeting optimal performance, including jitter and return-loss requirements, is to precisely follow the component and layout recommendations. note that at multi-gigabit speeds, using "equivalent" components or small pcb layout changes (even moving a via) can have significant detrimental effects. the easiest way for achieving the requirements of the coaxpress 1.1 specification is to use the recommended circuits, components and layout illustrated in figure 2-1 . for easy implementation, microchip will provide the gerber file. please ask for it by email. 2.1.1 right angle bnc figure 2-2 below shows the four layers of the recommended footprint for the eqco62t20.3 chip and the off-chip components that are critical for the rf-performance of the system. figure 2-2: recommended pc b layout for eqco62t20.3 note: email address: coaxpress@microchip.com downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 10 ? 2011-2016 microchip technology inc. in this layout, the size of the pcb area needed for the chip is minimized. approximately two times the bnc footprint area is required for the full bidirectional system: including the necessary elements for the power transport. the differential input of the chip must be a 100 ? differential transmission line. to minimize the parasitic capacitance of the input pins, a cut-out of the ground and power plane underneath the input pins is recommended. for best performance, no vias should be used in this high-speed signal path. a large cut-out underneath the right angle bnc connector, the ac coupling capacitors, ferrite beads and inductor is needed for minimal parasitics. this proposed layout is designed to be largely independent of the used pcb-layer stack. this will work as well for four, six or even higher numbers of layers. possible extra layers should have cut-outs as large as the full proposed footprint. figure 2-3: pcb layout of multil ane coaxpress 0v1 demo board pair camera side 5x6.25gb/s + 5x21mb/s host side cd_1 cd_2 cd_3 cd_4 eq_5 cd_5 eq_4 eq_3 eq_2 eq_1 downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 11 eqco62t20.3/EQCO31T20.3 2.1.2 multilane coaxpress 4+1 layout with din1.0/2.3 connectors figure 2-3 shows an example of a multilane coaxpress 4+1 setup. the recommended din1.0/2.3 connector is the npf 4076 from cambridge connectors. the cable example shows the pitches in millimeters. figure 2-4 shows the four layers of the recommended footprints and the off-chip components that are critical for rf-performance of the cable drivers cd_1 to cd_4 at the camera side, which have power over coaxpress (pocxp). figure 2-5 shows the variant without pocxp used for cd_5 at the host side. the exact dimensions in millimeters are given in section 4.1 ?package marking information? . it is recommended to copy these dimensions, especially the connection between the din1.0/2.3 connector and the chip, as this is a complex entity with coupled currents and compensated parasitic capacitances. despite the critical layout, this proposed layout is designed to be largely independent of the used pcb- layer stack, as the critical parts are mainly the top-layer only. this will work as well for four, six or even higher numbers of layers. possible extra layers should have cut-outs as large as the full proposed footprint. in these layouts, the size of the pcb area needed for the chip is minimized. this allows multiple lanes close together. only two of four connector gnd pins are connected to the gnd plane to reduce the capacitance. the differential cd inputs must be a 100 ? differential transmission line. a cut-out of the ground and power plane underneath the input pins is recommended to minimize the parasitic capacitance. for best performance, no vias should be used in this high-speed signal path. the components express 4+1 connector in figure 2-3 is only shown as an example. other connector configurations are available with din1.0/2.3 connectors such as 6+1, 2+1, 1+1, dual or single lane configurations. downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 12 ? 2011-2016 microchip technology inc. figure 2-4: recommended pcb layout for eqco62t20.3 with din1.0/2.3 connector with pocxp ground power bottom v1 v2 v3 v4 v5 v6 v7 v8 v9 v10 a b c d e f g h i j k l m n o p q r s t u v w x y ? z a ? top downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 13 eqco62t20.3/EQCO31T20.3 figure 2-5: recommended pcb layout for eqco62t20.3 with din1.0/2.3 connector without pocxp ground power bottom v3 v4 v5 v6 v7 v8 aa bb cc dd ee ff sg th ai b j ck dl em sn to top downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 14 ? 2011-2016 microchip technology inc. 2.2 guidelines for power receive unit at the power-out connection, the voltage supply for the camera (including the power supply for the eqco62t20.3) is expected. this load current should have low ripple. high- frequency ripple will be rejected by c7/l1/fb1/fb2 filtering in the reference circuit. however, mid-frequency ripple is to be avoided by the power supply itself. in a typical application, one could want to step-down from the 24v supply to all supply voltages needed inside the camera. it is in this case preferred to use a dc-to-dc converter that has a high switching frequency (e.g. 2 mhz) above one that has lower switching frequency (200 khz). the latter typically induces larger voltage spikes at the power-out connection. these will be only partially filtered out by said filter; the remainder will become crosstalk for the uplink channel. when too much crosstalk remains on the uplink channel, additional power supply filtering is required. this may be achieved by placing an extra filter network (not shown) in series with the power-out node. 2.3 power over coaxpress the eqco62t20.3 is compatible with the power over coaxpress system (pocxp). hence, power can be switched on and off by the host (e.g. frame grabber) through the 10 h inductor specified by the cxp standard. this switching is supported through a relay and through an electronic switch. powering through a wide-band bias-t is also supported. the eqco62t20.3 is also protected against the following events: hot plugging by frame grabber: in case the frame grabber has already applied its 24v on the coax when connecting the cable, no damage will occur to the eqco62t20.3 when connecting the powered coax cable. fast turn on and turn off of power supply by frame grabber direct 24v application, i.e. not through a 10 h inductor, is not supported since it causes permanent damage to the eqco62t20 device. downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 15 eqco62t20.3/EQCO31T20.3 3.0 electrical characteristics 3.1 absolute maximum ratings stresses beyond those listed under this section may cause permanent damage to the device. these are stress ratings only and are not tested. functional operation of the device at these or any other conditions beyond those indicated in the operational sections is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 3-1: absolute maximum ratings parameter conditions min. typ. max. units storage temperature -65 +150 c ambient temperature power applied -55 +125 c operating temperature normal operation (vcc = 1.2v 5%) -40 +85 c supply voltage to ground -0.5 +1.4 v dc input voltage -0.5 +1.6 v dc voltage to outputs -0.5 +1.6 v current into outputs outputs low 90 ma table 3-2: electrical characteristics (ove r the operating vcc and -40 to +85c range) parameter description min. typ. max. unit power supply vcc supply voltage 1.15 1.2 1.25 v i s supply current, both transmitting and receiving 60 ma i sr supply current when only receiving 30 ma sdip/sdin input ? v i input amplitude v sdi p,n 2x250 2x300 mv v turnon ? vi to turn on transmit function 2x150 2x250 mv v turnoff ? vi to turn off transmit function 2x50 2x150 mv r input differential input termination 2x50 ? sdop connection to coax z coax coax cable characteristic impedance 75 ? r sdo p input impedance between sdop and vcc/gnd 75 ? r loss coax return loss as seen on sdop pin frequency range = 5 mhz-1 ghz - 1 5d b r loss coax return loss as seen on sdop pin frequency range = 1 ghz-1.5 ghz - 1 0d b r loss coax return loss as seen on sdop pin frequency range = 1.5 ghz-3.2 ghz - 7d b ? v tx transmit amplitude 500 600 700 mv t rise_tx rise/fall time 20% to 80% of ? vtx 80 ps dcd duty cycle distortion on of v sdo p 5p s downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 16 ? 2011-2016 microchip technology inc. lfo output (lvttl-like) lfvcc uplink output driver power supply 1.2 3.3 v t rise_lfo rise/fall time 20% to 80% of vlfo for 20 pf load lfvcc = 1.2v 6n s lfvcc = 3.3v 5 ns table 3-3: jitter numbers parameter conditions min. typ. max. units additive peak to peak jitter on sdop/sdon (eqco62t20) downlink signal = 1.25 up to 6.25 gbps, prbs7 30 ps EQCO31T20 downlink signal = 1.25 up to 3.125 gbps, prbs7 30 ps peak to peak jitter on lfo 0-130m belden 1694a coax, over full vcc and temperature range; low-speed signal = 21 mbps, 8b/10b, downlink signal= 1.25-6.25 gbps,8b/10b 15 ns table 3-2: electrical characteristics (ove r the operating vcc and -40 to +85c range) (continued) downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 17 eqco62t20.3/EQCO31T20.3 4.0 packaging information 4.1 package marking information 16-lead plastic quad flat, no lead package 4x4x0.9 mm body [qfn] 16-lead qfn (4x4x0.9 mm) example pin 1 pin 1 eqco 62t20.3 yywwnnn yywwnnn legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 18 ? 2011-2016 microchip technology inc. b a 0.20 c 0.20 c (datum b) (datum a) c seating plane 1 2 n 2x top view side view bottom view for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: note 1 1 2 n 0.10 c a b 0.10 c a b 0.10 c 0.08 c microchip technology drawing c04-259b sheet 1 of 2 16-lead plastic quad flat, no lead package (8e) - 4x4x0.9 mm bod [qfn] d e 2x 16x (a3) a d2 e2 16x l 16x b e e 2 (16x k) a1 0.10 c a b 0.05 c downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 19 eqco62t20.3/EQCO31T20.3 microchip technology drawing c04-259b sheet 2 of 2 for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: number of pins overall height terminal width overall width overall length terminal length exposed pad width exposed pad length terminal thickness pitch standoff units dimension limits a1 a b d e2 d2 a3 e l e n 0.65 bsc 0.20 ref 1.951.95 0.45 0.25 0.80 0.00 0.30 4.00 bsc 0.55 2.05 2.05 0.870.02 4.00 bsc millimeters min nom 16 2.152.15 0.65 0.35 0.950.05 max k 0.425 ref ref: reference dimension, usually without tolerance, for information purposes only. bsc: basic dimension. theoretically exact value shown without tolerances. 1.2. 3. noes: pin 1 visual index feature may vary, but must be located within the hatched area. package is saw singulated dimensioning and tolerancing per asme y14.5m terminal-to-exposed-pad 16-lead plastic quad flat, no lead package (8e) - 4x4x0.9 mm bod [qfn] downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 20 ? 2011-2016 microchip technology inc. recommended land pattern for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: dimension limits units c2 optional center pad width contact pad spacing optional center pad length contact pitch y2 x2 2.15 2.15 millimeters 0.65 bsc min e max 3.625 contact pad length (x16) contact pad width (x16) y1 x1 0.725 0.30 bsc: basic dimension. theoretically exact value shown without tolerances. notes: 1. dimensioning and tolerancing per asme y14.5m microchip technology drawing c04-2259a nom 16-lead plastic quad flat, no lead package (8e) - 4x4x0.9 mm bod [qfn] silk screen 12 16 c1 contact pad spacing 3.625 contact pad to center pad (x16) g1 0.20 c1 c2 y2 x2 y1 g1 x1 e downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 21 eqco62t20.3/EQCO31T20.3 appendix a: revision history revision b (march 2016) updated section 4.0 ?packaging information? . removed electrostatic discharge ratings from table 3-1 . minor typographical changes. revision a (august 2014) this is the initial release of the document in the microchip format. this replaces eqcologic document version 1v5. table a-1: revision history version date comments 1v5 1/27/14 added references 1v4 4/10/12 added multilane coaxpress 4+1 layout with din1.0/2.3 connectors 1v3 10/4/11 section 5.5 on poxcxp was added 1v2 9/29/11 c1 and c2 in application circuit of figure 5 have changed to 33 nf 1v1 8/31/11 quality review 1v0 8/30/11 initial release of this document downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 22 ? 2011-2016 microchip technology inc. appendix b: typical line driver characteristics all measurements at vcc = 1.2v, temp = +25oc, data pattern = prbs7, 2x300 mv input amplitude. figure b-1: 1.25 gbps figure b-2: 3.125 gbps figure b-3: 6.25 gbps (eqco62t20 only) figure b-4: 2.5 gbps figure b-5: 5 gbps (eqco62t20 only) note: the imperfections in the output eye are caused by the limited bandwidth of the 75 ? to 50 ? matching pad that was used in this setup. the output amplitude is reduced due to this matching pad. downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 23 eqco62t20.3/EQCO31T20.3 appendix c: typical uplink characteristics all measurements at vcc = 1.2v, temp = +25oc, data pattern = 8b/10b test pattern at 21 mbps, 110 mv transmit amplitude using belden 1694a coaxial cable. measurements include power supply transmission; eqco62t20 is powered over the cable. measured into 15 pf capacitive load. figure c-1: 0m, no downlink signal figure c-2: 0m, downlink signal = 1.25 gbps, 8b/10b coded signal figure c-3: 130m, no downlink signal figure c-4: 130m, downlink signal = 1.25 gbps, 8b/10b coded signal downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 24 ? 2011-2016 microchip technology inc. appendix d: typical return-loss figure d-1 shows the return-loss at the bnc connector of the eqco62t20.3 evaluation board as shown in section 2.0 ?application information? and section 2.1 ?guidelines for pcb layout? with a supply current of 0 ma and 703 ma (maximum supply current for coaxpress) through the inductor (l1) and the ferrite beads (fb1 & fb2) and compares it with the coaxpress (full-speed) return-loss specification. figure d-1: return-loss of the eqco 62t20.3 bnc evaluation board with and without supply current downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 25 eqco62t20.3/EQCO31T20.3 appendix e: footprints used for the multilane coaxpress layout figure e-1: 0402, 0603 and via wi th thermal isolation footprints figure e-2: din1.0/2.3 and l1 inductor 1812 footprints table e-1: component positions of figure 2-4 component footprint x y angle npf 4076 din1.0/2.3 0 0 bottom eqco62t20.3 qfn 0 -7.4 c1 (50v) 0603 -0.325 -2.4 90 c2 0402 0.675 -2 90 r1 0402 0.675 -3.6 90 fb1 0603 -2.025 0.6 fb2 0603 -2.025 -0.6 r3 0402 -4.025 0.3 c6 (50v) 0402 -4.5 1.675 90 c9 0402 -1.975 -4.4 c10 0402 1.875 -4.4 c8 0402 -3.325 -10.35 90 0.52 0.52 0.40 0.90 0.75 0.60 1.20 ? 0.71 copper ? 0.35 drill 0.30 2.54 2.54 ? 1.50 copper ? 0.80 drill ? 2.60 copper ? 1.60 drill 3.00 1.60 2.28 downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 26 ? 2011-2016 microchip technology inc. table e-2: via positions of figure 2-4 table e-3: ground and vcc plane position of figure 2-4 l1 1812 -4.5 -7.875 90 bottom c7 (50v) 0603 -1.6 -7.325 90 bottom c5 0402 0 -9.825 90 bottom via thermal x y connected to 1 -4.9 -4.4 top-bottom 2 -4.1 -4.4 top-bottom 3 not isolated -1.575 -5.15 top-power 4 not isolated 1.575 -5.15 top-power 5 not isolated -2.325 -5.575 top-gnd-bottom 6 not isolated 2.275 -5.65 top-gnd-bottom 7 isolated -1.575 -9.375 top-gnd-bottom 8 isolated 1.575 -9.375 top-gnd-bottom 9 isolated -0.95 -10.35 power-bottom 10 isolated 0.95 -10.35 power-bottom gnd plane coordinates x y vcc plane coordinates x y a -3.15 -9.4 u -2.475 -9.45 b -2.475 -8.725 v -2.475 -5.225 c -2.475 -6.225 w -0.8 -5.225 d -2.775 -5.925 x -0.8 -6.3 e -2.775 -2.525 y 0.8 -6.3 f -1.25 -2.525 z 0.8 -5.225 g -1.25 -3.175 a 2.475 -5.225 h 0.675 -3.75 2.475 -9.45 i 0.675 -6.3 j 0.8 -6.3 k 0.8 -4.9 l 1.525 -4.175 m 1.525 -2.525 n 2.375 -2.525 o 2.375 -5.7 p 2.475 -5.7 q 2.475 -8.725 r3 . 1 5 - 9 . 4 s -0.8 -8.5 ? -0.8 -8.5 t 0.8 -10.05 ? 0.8 -10.35 component footprint x y angle downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 27 eqco62t20.3/EQCO31T20.3 table e-4: component positions of figure 2-5 table e-5: via positions of figure 2-5 figure e-3: track dimensions of figure 2-4 track width 1 0.3 qfn.1; qfn.4 (gnd) 21 0 0 ? diff (1) qfn.2-3 (sdip-sdin) 3 0.3 qfn.9;qfn.12 (vcc) 4 0.2 qfn.10 (sdon) 5 0.3 qfn.11 (sdop) 6 0.2 qfn.12 (lfvcc) 7 0.2 qfn.13 (lfo) 8 0.4/0.2 qfn.tab to c9,c10 9 0.5 c9,c10 to din1.0/2.3 10 0.5 c9,c10 to v3,4 11 0.4 c1 to din1.0/2.3 12 0.4 c2 13 0.4/0.7 fb 14 0.2 c6 15 0.5 bottom tracks note 1: width and spaces between lines needs to be calculated based on pcb layer stack. impedance should be 100 ? differential. component footprint x y angle npf 4076 din1.0/2.3 0 0 bottom eqco62t20.3 qfn 0 -6.375 c1 (50v) 0603 -0.525 -2.125 90 c2 0402 1.6 -0.05 90 r1 0402 0.675 -2.375 90 c9 0402 -3 -4.85 90 c10 0402 3 -4.85 90 c8 0402 -3.45 -7.55 90 c5 0402 0 -6.775 90 bottom via thermal x y connected to 3 not isolated -1.6 -4.325 top-power 4 not isolated 1.6 -4.325 top-power 5 isolated -3.675 -5.25 top-gnd-bottom 6 isolated 3 -6.025 top-gnd-bottom 7 isolated -1.5 -8.025 top-gnd-bottom 8 isolated 1.5 -8.025 top-gnd-bottom downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 28 ? 2011-2016 microchip technology inc. table e-6: ground plane position of figure 2-5 figure e-5: used layer stack gnd plane coordinates x y vcc plane coordinates x y a -1.15 -3.1 h -1.15 -3.95 b -1.15 -5.3 i -1.15 -5.3 c 1.15 -5.3 j 1.15 -5.3 d 1.15 -3.1 k 1.15 -3.95 e 4.225 -3.1 l 3.925 -3.95 f -0.8 -7.475 m -0.8 -7.475 g 0.8 -9.025 n 0.8 -9.325 figure e-4: track widths of figure 2-5 track width 1 0.3 qfn.1; qfn.4 (gnd) 2 100 ? diff. qfn.2-3 (sdip-sdin) 3 0.3 qfn.9; qfn.12 (vcc) 4 0.2 qfn.10 (sdon) 5 0.3 qfn.11 (sdop) 6 0.2 qfn.12 (lfvcc) 7 0.2 qfn.13 (lfo) 8 0.2 qfn.tab to c9,c10 9 0.4 c9,c10 to v3,4 10 0.5 c9,c10 to v5,6 11 0.4 c1 to din1.0/2.3 12 0.4 c2 13 0.5 bottom tracks downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 29 eqco62t20.3/EQCO31T20.3 the microchip web site microchip provides online support via our web site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: product support C data sheets and errata, application notes and sample programs, design resources, users guides and hardware support documents, latest software releases and archived software general technical support C frequently asked questions (faqs), technical support requests, online discussion groups, microchip consultant program member listing business of microchip C product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchips customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under support, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: distributor or representative local sales office field application engineer (fae) technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support downloaded from: http:///
eqco62t20.3/EQCO31T20.3 ds60001301b-page 30 ? 2011-2016 microchip technology inc. product identification system to order parts, including industrial, or obtain information, for e.g., on pricing or delivery, re fer to the factory or the list ed sales office . part no. xxx rm radio firmware device device: eqco62t20.3 temperature range: i = -40 ? cto+85 ? c (industrial temperature) package: tray = tray (blank) = tube examples: a) eqco62t20.3 = industrial temperature, 16-lead qfn tube packaging b) eqco62t20.3-tray = industrial temperature, 16-lead qfn tray packaging i temp. range module revision number f f downloaded from: http:///
? 2011-2016 microchip technology inc. ds60001301b-page 31 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, kleer, lancheck, link md, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, righttouch logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademar ks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2011-2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0371-5 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == downloaded from: http:///
ds60001301b-page 32 ? 2011-2016 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 austin, tx tel: 512-257-3370 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit novi, mi tel: 248-848-4000 houston, tx tel: 281-894-5983 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 new york, ny tel: 631-435-6000 san jose, ca tel: 408-735-9110 canada - toronto tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2943-5100 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - dongguan tel: 86-769-8702-9880 china - hangzhou tel: 86-571-8792-8115 fax: 86-571-8792-8116 china - hong kong sar tel: 852-2943-5100 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8864-2200 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 asia/pacific china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-3019-1500 japan - osaka tel: 81-6-6152-7160 fax: 81-6-6152-9310 japan - tokyo tel: 81-3-6880- 3770 fax: 81-3-6880-3771 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-213-7828 taiwan - taipei tel: 886-2-2508-8600 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - dusseldorf tel: 49-2129-3766400 germany - karlsruhe tel: 49-721-625370 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 italy - venice tel: 39-049-7625286 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 poland - warsaw tel: 48-22-3325737 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 sweden - stockholm tel: 46-8-5090-4654 uk - wokingham tel: 44-118-921-5800 fax: 44-118-921-5820 worldwide sales and service 07/14/15 downloaded from: http:///

▲Up To Search▲

Price & Availability of EQCO31T20

	To Download EQCO31T20 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .